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  NJW4840 - 1 - ver.2012-08-22 high speed switching gate driver general description ? package outline features output peak current: 4a (peak) operating voltage range: 8v to 20v high speed switching: 27.5nsec(typ.)@cl=4,700pf built-in thermal shut down under voltage lockout short circuit protection (power / ground fault) package: msop8 (vsp8) * meet jedec mo-187-da pin connection ? block diagram NJW4840r (msop8 (vsp8)) the NJW4840 is a high speed switching gate driver that is applicable 4a peak current. the NJW4840 features are withstand voltage of 24v, operating voltage range: 8v to 20v and fast switching time (27.5ns typical at 4700pf load). the NJW4840 is suitable for pdp sustain pulse drive, dc / ac motor drive, switching power supply, and dc / dc converter a pplications. 1. gnd 5. gnd 2. gnd 6. gnd 3. gnd 7. out 4. in 8. v dd 1 8 2 7 3 6 4 5 gnd out v dd in control logic uvlo tsd http://www..net/ datasheet pdf - http://www..net/
NJW4840 - 2 - ver.2012-08-22 absolute maximum ratings  (ta=25 c) parameter synbol ratings unit remark supply voltage v dd + 24 v v dd -gnd pin input voltage v in ? 0.3 to + 6 input voltage (pulse) v in-pulse ? 0.3 to + 7 v v in -gnd pin power dissipation p d 720 (*1) 1,100 (*2) mw ? junction temperature t j ? 40 to + 150 c ? operating temperature t opr ? 40 to + 105 c ? storage temperature t stg ? 50 to + 150 c ? (*1): mounted on glass epoxy board. (76.2114.3 1.6mm:based on eia/jdec standard, 2layers) (*2): mounted on glass epoxy board. (76.2114.3 1.6mm:based on eia/jdec standard, 4layers),  internal cu area: 74.274.2mm recommended operating conditions  (ta=25 c) parameter symbol min. typ. max. unit remark operating voltage vopr 8.0 ? 20 v v dd -gnd pin input voltage v in 0 ? 5.5 v v in -gnd pin http://www..net/ datasheet pdf - http://www..net/
NJW4840 - 3 - ver.2012-08-22 ? electrical characteristics (unless otherwise noted, v ds =16v, ta=25 c) parameter symbol test conditions min. typ. max. unit general i q1 v in =5v ? 0.93 1.6 ma quiescent current i q2 v in =0v ? 0.7 1.4 ma output block i pk1 pw 400us, v out =0v ? 4 ? a output peak current i pk2 pw 400us, v out =16v ? 4 ? a r dsh i o-source =100ma ? 0.8 1.5 ? output on resistance (high-side / low-side) r dsl i o-sink =100ma ? 0.8 1.5 ? pull down resistance r pd 60 100 140 k ? input circuit block in pin high resistance v ihin 3.0 ? 5.5 v in pin low resistance v ilin 0 ? 1.5 v in pin sink current i iin v in =5.5v ? ? 1 a in pin hysteresis voltage ? v in v ihin ? v ilin ? 0.3 ? v uvlo block uvlo release voltage v uvlo2 6.3 7 7.7 v uvlo operating voltage v uvlo1 6 6.7 7.4 v uvlo hysteresis voltage ? v uvlo v uvlo2 ? v uvlo1 ? 0.3 ? v output rise / fall characteristics   (v + =16v, ta=25 c, design value*) parameter symbol test condition min. typ. max. unit output rise time tr c l =4700pf, v in =0 to 5v 15.0 27.5 40.0 ns output fall time tf c l =4700pf, v in =5 to 0v 15.0 27.5 40.0 ns rise delay time t d_on c l =4700pf, v in =0 to 5v 17.5 30.0 42.5 ns fall delay time t d_off c l =4700pf, v in =5 to 0v 25.0 37.5 50.0 ns * it is design guaranteed, not tested. http://www..net/ datasheet pdf - http://www..net/
NJW4840 - 4 - ver.2012-08-22 timing chart t d_on 10% in out 90% tr 90% 10% tf 90% 10% t d_off typical application + igbt NJW4840 input v + power supply v dd gnd v in out 10 0.1 http://www..net/ datasheet pdf - http://www..net/
NJW4840 - 5 - ver.2012-08-22 application tips in the application that does a high-speed switching of njw 4840, because the current flow corresponds to the input frequency, the substrate (pcb) layout becomes an important. NJW4840 is driving the high-side/low-side sw gate with hi gh speed to reduce switching losses. the transient voltage is generated by parasitic inductance and a high-s peed current change of high side and low side sw. you should attempt the transition voltage decrease by maki ng a current loop area minimize as much as possible. therefore, you should make a current flowi ng line thick and short as much as possible. you should insert a bypass capacitor between the v dd pin and the gnd pin to prevent malfunction by generating over voltage and/or exceed maximum input voltage rating. the recommended bypass capacitor is low esr and high frequency characteristic (njrc recommends 0.1 f or more). an aluminum electrolysis capacitor is recommended for smoothing condenser. (njrc recommends 10 f or more). however, you should use large capacitor by sufficient eval uation (assessment) due to l oad condition and/or application use environment. (there is a possibi lity that the supply voltage rises by inductiv e kickback when the supply current of the inductive load is large.) the bypass capacitors should be connected as much as possible near the vdd pin. http://www..net/ datasheet pdf - http://www..net/
NJW4840 - 6 - ver.2012-08-22 characteristics NJW4840 supply current1-supply voltage 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 0 5 10 15 20 supply voltage[v] supply current1[ma] vdd=20v  0v vdd=0v  20v vin=5v ta=25 ? NJW4840 supply current2-supply voltage 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 0 5 10 15 20 supply voltage[v] supply current2[ma] vdd=20v  0v vdd=0v  20v vin=0v ta=25 ? NJW4840 i nput threshold voltage-supply voltage 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5 101520 supply voltage[v] input threshold voltage[v] *oqvu5fsnjobm-087pmubhf *oqvu5fsnjobm)jhi7pmubhf ta=25 ? NJW4840 output on resistance  pmos-output current 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0.01 0.1 1 10 output current[a] output on resistance[ ? ] pmos nmos vdd=16v ta=25 ? NJW4840 supply current-temperature 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -50 -25 0 25 50 75 100 125 150 ambient temperature[oc] supply current[ma] iq1(vdd=16v y vin=5v) iq2  vdd=16v y vin=0v  NJW4840 uvlo operation/release voltage-temperature 6 6.2 6.4 6.6 6.8 7 7.2 7.4 7.6 7.8 8 -50 -25 0 25 50 75 100 125 150 ambient temperature[oc] uvlo operation/release voltage[v] uvlo operating voltage uvlo release voltage http://www..net/ datasheet pdf - http://www..net/
NJW4840 - 7 - ver.2012-08-22 characteristics NJW4840 output on resistance-temperature 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -50 -25 0 25 50 75 100 125 150 ambient temperature[oc] output on resistance[ ? ] pmos nmos vdd=16v io=100ma NJW4840 input threshold voltage-temperature 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 -50 -25 0 25 50 75 100 125 150 ambient temperature[oc] input threshold voltage[v] input terminal low voltage input terminal high voltage NJW4840 output rise/fall time-temperature 0 10 20 30 40 50 60 70 80 -50 -25 0 25 50 75 100 125 150 ambient temperature[oc] output rise/fall time[ns] output rise time ca output fall time c f NJW4840 output propagation delay time-temperature 0 10 20 30 40 50 60 70 80 -50 -25 0 25 50 75 100 125 150 ambient temperature[oc] output propagation delay time[ns] output rise delay time  td_on output fall delay time  td_off [caution] the specifications on this datasheets are only given for information , without any guarantee as regards either mistakes or omissions. the application circuits in this datasheets are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. http://www..net/ datasheet pdf - http://www..net/


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